A 25-to-28 Gb/s High-Sensitivity ( 9.7 dBm) 65 nm CMOS Optical Receiver for Board-to-Board Interconnects

Abstract

To address the two main challenges concerning the design of a transimpedance ampli fier (TIA), namely, improving the sensitivity of the TIA without sacri ficing bandwidth and suppressing inter-symbol interference (ISI) due to insertion loss, a 25 Gb/s optical receiver (RX) based on 65 nm CMOS technology, including a TIA and a PD operating at 1.3 m wavelength, was developed. The key components of the TIA are a two-stage offset-cancelation scheme and a low-voltage output driver with peaking gain of 7.7 dB at 12.5 GHz. This driver performance is achieved by separating the equalizer function and output buffer of the driver. The TIA attains a sensitivity of 9.7 dBm (86- ) OMA and an eye opening of 65% at data rate of 25 Gb/s. The optical RX operates at 28 Gb/s with sensitivity of 8.2 dBm (121- ) OMA. Utilizing the CMOS TIA, an implemented VCSEL-based opt ical link operating at 850 nm wavelength achieves sensitivity of 7.3 dBm (98- )O M A . Power consumption and power ef ficiency of the optical RX at data rate of 28 Gb/s are respectively 137.5 mW and 4.9 mW/Gb/s.