← 返回 JSSC 论文列表JSSC 2014第10期RF & Wireless45nm
A Frequency-Agile RF Frontend Architecture for Multi-Band TDD Applications
提出一种频率敏捷的射频前端架构,支持多频段TDD应用,实现高效集成。
45 nm SOI CMOS, 1.3-3.3 GHz, 27.7 dBm, 30%效率
射频前端多频段TDDCMOS频率敏捷
▸创新点1:频率敏捷的射频前端架构(方法创新)。该论文提出了一种新型的频率可调射频前端架构,能够在1.3至3.3 GHz的宽频率范围内动态调整,覆盖11个TDD频段,显著减少了传统多频段射频前端的冗余组件,提高了系统的灵活性和集成度。
▸创新点2:高度数字化的设计(系统创新)。采用高度数字化的架构,利用45 nm SOI CMOS工艺实现了全集成解决方案,不仅提升了频率范围和效率,还受益于CMOS工艺的缩放优势,降低了功耗(仅6 mA from 1 V)并改善了性能(NF = 4.4 dB)。
▸创新点3:宽频率范围可调(电路创新)。通过创新的电路设计,实现了从1.44到3.41 GHz的频率可调范围,支持64 QAM、20 MHz信号的TDD LTE应用,测量结果显示ACLR优于30 dBc,EVM达到30 dB,平均效率高达17.2%,输出功率为23.4 dBm。
▸创新点4:高效率功率放大器(性能创新)。功率放大器在1.3至3.3 GHz范围内实现了27.7 dBm的峰值输出功率和30%的总效率,特别是在2 V电压下表现出色,满足了现代移动设备对高效率和低功耗的需求。
Abstract
Emerging wireless standards specify dozens of bands spanning several octaves, which need to be supported in form-factor and energy constra ined mobile devices targeting ubiquitous connectivity. However, in current multi-band radio implementations, signi ficant redundancy is still the norm in the RF frontend. This work introduces an improved architecture for multi-band, time-division duplexed (TDD) radios, which replaces multiple narrowband frontend co mponents with a frequency-agile solution, tunable over a wide frequency range. A highly digital architecture is adopted, leadin g to a fully integrated solution wherein both ef ficiency and achievable frequency range bene fit from CMOS scaling. A prototype is integrated in 45 nm SOI CMOS. Peak PA output power is 27.7 0.5 dBm from 1.3 to 3.3 GHz, with up to 30% total ef ficiency at 2 V. For TDD LTE applications, better than 30 dBc ACLR and 30 dB EVM is measured with 64 QAM, 20 MHz signals from 1.44 to 3.41 GHz, with up to 17.2% average ef ficiency and 23.4 dBm average power. The LNA achieves 14 dB, NF = 4.4 1.6 dB and IIP 7d B mf r o m1 . 3t o3 . 3G H zw h i l ed r a w i n gj u s t6m A from 1 V. The demonstrated freq uency range covers a total of 11 TDD bands.