A Hybrid Loop Two-Point Modulator Without DCO Nonlinearity Calibration by Utilizing 1 Bit High-Pass Modulation Ni Xu

Abstract

This paper presents a two-point modulator architec- ture which is immune to the non linear effect of the digitally-con- trolled oscillator (DCO). By utilizing a 1 bit ΔΣ modulation with embedded finite-impulse response (FIR) filtering the high-pass modulation path does not su ffer from the DCO gain nonlinearity, thus requiring absolute gain calibration only. The digital FIR filter in the high-pass modulation path not only suppresses quanti- zation noise but also red uces noise coupling with time-interleaved switching of partitioned capacitors. A hybrid FIR filtering method is also employed for the low-pass modulation path to enhance the linearity of the fra ctional-N phase-locked loop (PLL). A 1.8 GHz two-point modulator based on a se mi-digital PLL is implemented in 65 nm CMOS consuming 6.9 mW from a 1 V supply. At the divide-by-2 outp ut frequency of 913.2 MHz, the error-vector magnitude (EVM) values of 1.79% and 1.63% are achieved with 1.08 Mb/s and 270 kb/s GMSK modulation respectively. When the 1.08 Mb/s G FSK modulation is performed with the same PLL parameters, the EVM value of 1.96% is achieved.