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JSSC 2014第11期RF & Wireless65nmDRAM

An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface Soo-Min Lee, Il-Min Yi, Hae-Kang Jung, Hyunbae Lee, Y ong-Ju Kim, Y un-Saing Kim, Byungsub Kim, Jae-Y

提出一种低能耗单端双二进制收发器,用于DRAM接口,能效达0.56 pJ/bit@7Gb/s。
0.56 pJ/bit@7Gb/s, 80 mV信号摆幅
单端双二进制低能耗收发器TIADRAM接口
80 mV信号摆幅降低功耗
采用TIA作为接收端终端并放大信号
自动校准参考电压实现小摆幅信号传输
Abstract
A low-energy single-ended duobinary transceiver is proposed for the point-to-point DRAM interface with an energy efficiency of 0.56 pJ/bit at 7 Gb/s. The transmitter power is reduced by decreasing the signal swing of transmission channel to 80 mV and replacing the multiplexer and the binary output driver in the transmitter by a duobinary output driver. A trans-impedance amplifier (TIA) is used at the receiver end of transmission channel. The TIA works as a receiver termination and also ampli fies the input signal for subsequent processing. Analysis of the feedback loop delay and the nonlinearity of the TIA shows that they do not impose serious problems. The T IA output signal is applied to a duobinary-to-NRZ converter, which is implemented by using a direct feedback 1-tap DFE circuit with a tap-coef ficient of 1.0. The reference voltage of the duobinary-to-NRZ converter is calibra ted automatically to enable a small-swing signaling. The proposed transceiver chip in a 65 nm CMOS process works at 4.5 Gb/s with a3 ″ FR4 microstrip line, and at 7 Gb/s with a 0.6 ″ FR4.