← 返回 JSSC 论文列表JSSC 2014第12期Clocking & PLLs90nm SiGe BiCMOSVCOClock Generation
A Silicon-Based 0.3 THz Frequency Synthesizer With Wide Locking Range Pei-Y uan Chiang, Student Member , IEEE, Zheng Wang , Student Member , IEEE
一款基于90nm SiGe BiCMOS工艺的300GHz频率合成器，采用三重推挽VCO和三相位注入分频器，实现宽锁定范围和低相位噪声。
相位噪声-77.8dBc/Hz@100kHz(-82.5dBc/Hz@1MHz), 锁定范围280.32-303.36GHz(7.9%)
太赫兹频率合成器三重推挽VCO三相位注入Colpitts有源变容管
▸采用Colpitts基有源变容管(CAV)的三重推挽VCO
▸三相位注入分频器大幅提升锁定范围
▸CAV同时提供频率调谐和谐波功率增强
Abstract
A 300 GHz frequency synthesizer incorporating a triple-push VCO with Colpitts-based active varactor (CA V) and a divider with three-phase injection is introduced. The CA V provides frequency tunability, enhances harmonic power, and buffers/injects the VCO fundamental signal from/to the divider. The locking range of the divide r is vastly improved due to the fact that the three-phase injection introduces larger allowable phase change and injection power into the divider loop. Im- plemented in 90 nm SiGe BiCMOS, the synthesizer achieves a phase-noise of –77.8 dBc/Hz ( –82.5 dBc/Hz) at 100 kHz (1 MHz) offset with a crystal reference, and an overall locking ra nge of 280.32–303.36 GHz (7.9%).