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A 16 nm 128 Mb SRAM in High- Metal-Gate FinFET Technology With Write-Assist Circ
16纳米FinFET技术中实现128Mb SRAM，采用两种写入辅助技术降低最小供电电压。
128Mb容量，供电电压降低300mV（95%分位）
SRAMFinFET写入辅助高k金属栅低功耗
▸抑制耦合信号负位线技术(SCS-NBL)
▸写入恢复增强低单元VDD技术(WRE-LCV)
▸面积开销分别仅为2%和3%
Abstract
A 128 Mb 0.07 m 6T high-density SRAM bitcell
with write-assist circuitry has been successfully implemented using
16 nm high-k metal gate FinFET technology. This study proposes
two write-assist techniques: 1) suppressed coupling signal nega-
tive bit-line (SCS-NBL) technique and 2) write recovery enhanced
lower cell-VDD (WRE-LCV) technique to reduce the SRAM min-
imal supply voltage. The area ov erheads of these two techniques
are 2% and 3%, respectively. The silicon data show that both of
these