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JSSC 2015第1期Clocking & PLLs28nm

A 460 MHz at 397 mV 26 GHz at 13 V 32 bits VLIW DSP Embedding F MAX Tracking E

28nm FDSOI技术下32位DSP实现宽电压范围高效能运行
28nm FDSOI, 397mV-1.3V, 460MHz@397mV, 2.6GHz@1.3V
宽电压范围体偏置电压能效优化最大频率跟踪32位DSP
采用体偏置电压技术降低核心电压至397mV
最大频率跟踪设计技术提升能效40.6%
在0.53V时实现62pJ/op的最低峰值能耗
Abstract
Wide voltage range operation for DSPs brings more versatility to achieve high energy ef ficiency in mobile applications. This paper describes a 32 bits DSP fabricated in 28 nm Ultra Thin Body and Box FDSOI technology. Body Biasing Voltage ( V B B )s c a l i n gf r o m0Vu pt o± 2Vd e c r e a s e st h ec o r eV D D M I N to 397 mV and increases clock frequency by +400%@500 mV and +114%@1.3 V. The DSP frequency measurements show 2.6 GHz@1.3 V(VDD)@2 V(VBB) and 460 MHz@397 mV(VDD)@2 V(VBB). The lowes