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4×25 Gb/s Transceiver With Optical Front-end for 100 GbE System in 65 nm CMOS Technology Ping-Chuan Chiang , Student Member , IEEE, Jhih-Y u Jiang, Hao-Wei Hung, Chin-Y
本文介绍了一种用于100 GbE系统的4×25 Gb/s全集成收发器芯片组,采用65 nm CMOS工艺。
65 nm CMOS, 4×25 Gb/s, 100 GbE标准
收发器100 GbECMOS均衡器光学前端
▸4×25 Gb/s全集成收发器芯片组
▸内置时钟生成、均衡和放大功能
▸采用前馈均衡器和连续时间线性均衡器
Abstract
This paper presents a fully-integrated chipset for 4×25 Gb/s transceiver gearbox al ong with laser driver and photo detector front-ends. The transce iver provides 10:4 multiplexing and 4:10 demultiplexing convers ion, with built-in clock genera- tion, equalization, and amplific ation. The optical front-ends are realized as 4-element arrays, presenting remarkable performance with commercial vertical-cavity surface-emitting lasers and pho- todiodes. Feedforward equalizers and continuous-time linear equalizers are employed to compe nsate for loss and distortion in both electrical and optical domains. Fabricated in 65 nm CMOS technology, these chips can be lumped together as a compact module with performance exceeding typical 100 GbE standards.