← 返回 JSSC 论文列表JSSC 2015第2期RF & Wireless45nmEqualizer
A 25 Gbs 58 mW CMOS Equalizer
一款采用45nm工艺的低功耗25Gbps CMOS均衡器设计
25Gbps, 58mW, 1V供电, 24dB损耗补偿
低功耗有线接收器铜介质电荷导向均衡器
▸创新点1:连续时间线性均衡器(CTLE)采用创新的高频增益提升技术,有效补偿铜介质传输中的高频损耗,在24 dB信道损耗下实现稳定信号恢复,属于电路创新。
▸创新点2:两抽头半速率/四速率判决反馈均衡器(DFE)通过创新的时序控制架构,在降低时钟速率的同时保持均衡精度,减少50%动态功耗,属于系统级方法创新。
▸创新点3:电荷导向技术(Charge Steering)在DFE关键路径中替代传统电流模操作,将抽头功耗降低至0.5mW/抽头,整体功耗仅58mW@25Gbps,属于电路级功耗优化创新。
▸创新点4:45nm CMOS工艺下实现1V超低供电电压,通过衬底偏置技术解决深亚微米器件泄漏问题,使能效达2.32pJ/bit,属于工艺-电路协同创新。
Abstract
Low-power equalization remains in high demand for
wireline receivers operating at tens of gigabits per second in copper
media. This paper presents a design incorporating a continuous-
time linear equalizer and a two-tap half-rate/quarter-rate deci-
sion-feedback equalizer that exploits charge steering techniques to
reduce the power consumption. Re alized in 45 nm technology, the
prototype draws 5.8 mW from a 1 V supply and compensates for
24 dB of loss with
.