A High-Power and Scalable 2-D Phased Array for Terahertz CMOS Integrated Systems Y

Abstract

This work introduces a 2-D phased array architecture that is suitable for high power radiation at mm-Wave and Tera- hertz frequencies. We address the challenge of signal generation above the cut-off frequency of transistors by presenting a radia- tion method based on the collective performance of a l arge number of synchronized sources. As theory shows, both frequency locking/ tuning and beam steering can be independently achieved by ma- nipulating the local coupling between the nearest neighbors. This control method results in a dynamical network that is insensitive to array dimensions and is scalab le to the point that can achieve a level of output power and spectral purity beyon dt h er e a c ho f conventional sources. To demonstrate the concept, we implement a4 4 version of this phased array at 340 GHz using a 65 nm bulk CMOS process. The paper presents the desi gn and implementa- tion of the oscillators, couplings and the integrated antennas. The measured results at 338 GHz reveal a peak equivalent isotropi- cally radiated power (EIRP) of +17.1 dB m and a phase noise of -93 dBc/Hz at the 1 MHz offset freq uency. This chip presents the first fully integrated terahertz p hased array on silicon. Further- more, the output power is higher than any lens-less silicon-based source above 200 GHz and the phase noise is lower than all silicon radiating sources above 100 GHz.