Design of A Transformer-Based Reconfigurable Digital Polar Doherty Power Amplifier Fully Integrated in Bulk CMOS Song Hu , Student Member , IEEE

Abstract

This paper presents a digital polar Doherty power amplifier (PA) fully integrated in a 65 nm bulk CMOS process. It achieves +27.3 dBm peak output power and 32.5% peak PA drain efficiency at 3.82 GHz and 3.60 GHz, respectively. The proposed digital Doherty PA architecture optimizes the cooperation of the main and auxiliary amplifiers and achieves superior back-off efficiency enhancement (a maxi mum 47.9% improvement versus the corresponding Class-B operati on). This digital intensive ar- chitecture also allows in-field PA reconfigurability which both provides robust PA operation against antenna mismatches and al- lows flexible trade-off optimization on PA efficiency and linearity. Transformer-based passives are employed as the Doherty input and output networks. The input 90 signal splitter is rea lized by a 6-port folded differential transformer structure. The active Doherty load modulation and power combining at the PA output are achieved by two transformers in a parallel configu ration. These transformer-based passives ensure an ultra-compact PA design (2.1 mm ) and broad bandwidth (24.9% for 1d BP bandwidth). Measurement with 1 MSym/s QPSK si gnal shows 3.5% rms EVM with +23.5 dBm average output power and 26.8% PA drain efficiency. Measurement with 16-QAM signal exhibits the PA's flexibility on optimizing efficienc y and linearity.