← 返回 JSSC 论文列表JSSC 2015第6期Other0.14μm SOI BCD
A High-V oltage Class-D Power Amplifier With Switching Frequency Regulation for I
设计了一种高效率高压D类功放,通过自适应调节开关频率优化全功率范围效率。
93% efficiency at 45 W, efficiency down to 4.5 W and 0.45 W
高压D类功放开关频率调节功率效率SOI BCD工艺自适应优化
▸创新点1:自适应开关频率调节(系统创新)。该放大器通过动态调节开关频率,实现了在全输出功率范围内的最优功率效率,显著提升了系统能效。
▸创新点2:基于开关节点电压检测的优化(方法创新)。通过检测功率开关开启瞬态的开关节点电压电平,实现了开关频率的自适应调节,优化了功率效率。
▸创新点3:高效率设计(电路创新)。采用0.14μm SOI BCD工艺,该放大器在45W输出功率下实现了93%的效率,并在低至0.45W输出功率时仍保持高效率。
▸创新点4:高电压应用适应性(系统创新)。该设计特别适用于高电压环境,能够在高电压条件下保持高效运行,扩展了应用场景。
Abstract
This paper describes the power dissipation analysis
and the design of an efficiency-improved high-voltage class-D
power amplifier. The amplifier ada ptively regulates its switching
frequency for optimal power efficiency across the full output
power range. This is based on dete cting the switching output node
voltage level at the turn-on transition of the power switches. Im-
p l e m e n t e di na0 . 1 4
m SOI BCD process, the amplifier achieves
93% efficiency at 45 W output power, %p o w e re f fi c i e