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JSSC 2015第7期mm-Wave28nm

A 40–67 GHz Power Amplifier With 13 dBm and 16% PAE in 28 nm CMOS LP

提出一种针对毫米波宽带功率放大器的设计方法,实现高效率和宽带宽。
28nm CMOS, 13 dBm, 16% PAE, 40–67 GHz
毫米波功率放大器宽带高效率CMOS
创新点1:采用电感耦合谐振器进行阻抗缩放,通过Norton变换实现阻抗匹配,显著提升了宽带功率放大器的效率和增益带宽积(GBW),解决了毫米波频段宽带功率生成的难题。
创新点2:利用拓扑变换减少元件数量,通过引入变压器并优化负载阻抗,简化了级间和输出匹配网络的设计,降低了电路的复杂性和成本,同时保持了高性能。
创新点3:使用中和共源级设计提高性能,通过中和技术有效抑制了共源级的寄生电容,提升了放大器的线性度和稳定性,实现了40-67 GHz带宽内13 dBm的输出功率和16%的峰值功率附加效率(PAE)。
创新点4:在28 nm CMOS LP工艺中实现毫米波功率放大器,展示了在低功耗工艺下实现高频高性能的可行性,为未来毫米波通信系统的集成提供了技术参考。
Abstract
Pushed by the availability of large fractional band- widths, many well-establishe d applications are focusing mm -wave spectrum for product deployment. Generation of broadband power at mm-waves is challenging because a key target such as the efficiency trades with the gain-bandwidth (GBW) pro duct. The major limit is the capacitive paras itics at the interstage between driver and power devices. The l atter are designed with a large form factor so as to deliver the desired output pow er and are commonly biased in class-AB to achieve high drain efficiency, penalizing GBW. In this paper, a design methodology for inter- stage and output matching networks targeting l arge fractional bandwidth and high efficiency is proposed. Leveraging induc- tively coupled resonators, we ap ply Norton transformations for impedance scaling. In both networks, to pological transformations are employed to include a transformer, achieve the desired load impedance and minimize the number of components. A two-stage differential PA with neutralized com mon source stages has been realized in 28 nm CMOS using low-power devices. The PA delivers 13 dBm saturated output power over the 40–67 GHz bandwidth with a peak power-added efficien cy of 16% without power com- bining. To the best of author's knowledge, the presented PA shows state-of-the-art performances with the largest fractional bandwidth among bulk CMOS mm- wave PAs reported so far.