A Programmable Frequency Multiplier-by-29 Architecture for Millimeter Wave Applications Clément Jany, Alexandre Siligaris, Jose

Abstract

This paper presents an original mmW frequency multiplier that provides the channel ce nter frequencies of the IEEE 802.15.3c standard from a much lower and fixed frequency of 2.16 GHz. It is composed of a voltage-controlled oscillator (VCO) whose supply is periodical ly switched on-and-off by the input signal, providing Periodic ally Repeated Oscillations Train (PROT). This multi-harmonic signal is injected into an oscillator (ILO) that locks onto the harmo nic of interest, providing a con- tinuous wave sinusoidal signal in the 60 GHz band. The CMOS 40 nm circuit consumes 32 mW and occupies only 0.07 mm .A theoretical approach on th e synchronization of the PROT signal generator and the ILO is propos ed, based on custom approxi- mated solutions of the Van der Pol oscillator and highlighting new synchronization p henomena. Based on this theory, this novel programmable multiplication technique requires a unique fixed low frequency reference to perform multi-channel mmW LO gen- eration. The phase n oise of the output LO signal is only limited by the input low frequency reference phase noise and the frequency ratio between the output and the input signals. Thus, a 60 GHz signal has been g enerated with this technique with a record phase noise of 104 dBc/Hz@1 MHz offset.