← 返回 JSSC 论文列表
📄 下载 JSSC 原文 PDF
JSSC 2015第8期RF & Wireless0.18 µm

A 5.8 nW CMOS Wake-Up Timer for Ultra-Low-Power

提出一种超低功耗振荡器,用于紧凑型无线传感器的唤醒定时器。
58 nW, 45 ppm/°C, 1%/V
超低功耗唤醒定时器CMOS振荡器无线传感器
创新点1:恒定电荷减法方案(方法创新)。通过每次循环减去恒定电荷量而非传统固定电压复位,消除了时钟周期对比较器延迟的依赖,降低了功耗(58 nW),同时保持温度稳定性(45 ppm/°C)和电源敏感性(1%/V)。
创新点2:粗时钟比较器替代高功耗连续比较器(电路创新)。采用低功耗时钟比较器替代传统连续比较器,仅在唤醒时间结束时启用精确连续比较器,显著降低动态功耗(比较器功耗减少90%以上)。
创新点3:精确唤醒信号生成(系统创新)。通过混合架构(粗时钟+精确比较器)实现ns级唤醒时间精度,在超低功耗(5.8 nW)下达成0.18 µm工艺的1.2-2.2V宽电压工作范围。
创新点4:温度补偿设计(电路创新)。集成温度稳定机制(45 ppm/°C),在-10°C至90°C范围内保持计时误差<0.5%,解决了传统振荡器温度漂移问题。
Abstract
This work presents an ultra-low-power oscillator designed for wake-up timers in compact wireless sensors. In a conventional relaxation oscillator, a capacitor periodically resets to a fixed voltage using a continuous comparator, thereby gen- erating an output clock. The reset is triggered by a continuous comparator and thus the clock period is dependent on the delay of the continuous comparator which therefore needs to be fast compared to the period, making this approach power hungry. To avoid the power penalty of a fast continuous comparator, a constant charge subtraction scheme is proposed in this paper. As a constant amount of charge is subtracted for each cycle, rather than discharging/charging the c apacitor to a fixed voltage, the clock period becomes independe nt of comparator delay. There- fore, the high power continuous comparator can be replaced with a coarse clocked comparator, facilitating low-power time tracking. For precise wake-up signal generation, an accurate continuous comparator is only enabled for one clock period at the end of the specified wakeup time. A wake-up timer using the proposed scheme is fabricated in a 0.18 µm CMOS process. The timer consumes 5.8 nW at room te mperature with temperature s t a b i l i t yo f4 5p p m / ° C( - 1 0° Ct o9 0° C )a n dl i n es e n s i t i v i t yo f 1%/V (1.2 V to 2.2 V).