A Micro-Power Two-Step Incremental Analog-to-Digital Converter Chia-Hung Chen, Yi Zhang , Student Member , IEEE,T a o H e ,P a t r i c k Y . C h i a n g, Member , IEEE,a n d

Abstract

Integrated sensor interface circuits require energy-ef- ficient high-resolution data conve rters. This paper proposes a two- step incremental A/D converter (IADC) which extends the perfor- mance of an th-order IADC close to that of a th-order IADC. The implemented device uses the circuitry of a second-order IADC (IADC2) to achieve close to third-order SNR performance. The proposed circuit does not r equire very high opamp DC gain; the gain can be as low as 60 dB for 100 dB SNR data conversion. The implemented IADC achieves a measured dynamic range of 99.8 dB, and an SNDR of 91 dB for a maximum input 2.2 V and a bandwidth of 250 Hz. Fabricated in 65 nm CMOS, the IADC's core area is 0.2 mm2, and it consumes only 10.7 µW. The measured FoMs are 0.76 pJ/conversion and 173.5 dB, both among the best reported results for IADCs. The measured results verify that the proposed two-step IADC is a more energy-efficient data conver- sion scheme than conventi onal high-order IADCs.