JSSC 2015第9期Clocking & PLLs0.18μm CMOS

An 82 Gbs-to-103 Gbs Full-Rate Linear Referenceless CDR Without Frequency Detect

提出一种无需参考时钟的全速率线性CDR，通过非对称相位检测器提升捕获范围，实现稳健的频率和相位获取。

输出数据随机抖动0.336 ps，带外抖动容限0.34 UI

全速率CDR无参考时钟线性相位检测抖动容限频率获取

▸采用非对称相位检测器提升捕获范围

▸无需参考时钟和独立频率检测器

▸新增相位调整模式以改善抖动容限性能

Abstract

An 8.2 Gb/s-to-10.3 Gb/s full-rate referenceless CDR in 0.18 mC M O Si sp r e s e n t e d .B yr e a l izing an asymmetric phase detector transfer curve, the linear CDR's “single-sided” capture range increases, which allows the Hogge phase detector itself to function as a frequency detector, thus eliminating the ne ed for the reference clock and the separate frequency detector in conven- tional dual-loop CDRs. Robust f requency and phase acquisition is demonstrated. Furthermore, a new phase adjus