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JSSC 2015第11期Digital Circuits65nm

A 27 mW Reconfigurable Marker-Less Logarithmic Camera Pose Estimation Engine for Mobile Augmented Reality Processor Injoon Hong, Student Member , IEEE , Gyeonghoon Kim , Student Member , IEEE , Y ouchang Kim, Student Member , IEEE, Donghyun Kim ,M e m b e r ,IEEE

提出一种27mW可重构无标记对数相机姿态估计引擎,用于移动增强现实应用。
65nm CMOS, 27mW功耗
无标记相机姿态估计增强现实对数处理单元可重构计算低功耗设计
可重构对数SIMD处理器
推测执行(SE)减少17%计算时间
可重构数据排列层(RDL)减少27%计算时间
Abstract
A marker-less camera pose estimation engine (CPEE) with reconfigurable logarithmic SIMD processor is p roposed for the view angle estimation used in mobile augmented reality (AR) applications. Compared to pre vious marker-based approach, marker-less camera pose e stimation can overlay v irtual images directly on natural world without the help of markers. How- ever, they require 150x larger computing costs and large power consuming floating-point operations wher e such requirement severely restricts real-time operations and low-power implemen- tations in mobile platform, respectively. To overcome the gap in computational costs between marker- based and marker-less method, speculative execution (SE) and reconfigurable data-ar- rangement layer (RDL) are proposed to reduce computing time by 17% and 27%, respectively. For low- power implementation of floating-point units, logarithmic processing element (LPE) is designed to reduce overall power consumption by 18%. The proposed marker-less CPEE is fa bricated in 65 nm Logic CMOS technology, and successfully realizes real-time marker-less camera pose estimation with only 27 mW power consumption.