A 25 Gb/s Burst-Mode Receiver for Low Latency Photonic

Abstract

We report a dc-coupled burst-mode (BM) receiver for optical links in a dynamically reconfigurable network. Through the introduction of interlocking search algorithms, a robust 25 Gb/s BM operation is achieved with 31 ns lock time. At the beginning of the burst, the receiver first performs input dc cur- rent offset calibration in 12.5 ns, then achieves phase lock in 18.5 ns, and after that tracks data using a phase interpolator (PI) based bang-bang clock and data recovery (CDR). The sensitiv- ity of the receiver is −10.9 dBm (average power, BER < 10 −12) at 25 Gb/s, tested with a single mode 1550 nm reference optical transmitter . There is no significant sensitivity penalty in the pres- ence of ±100 ppm frequency offset between the transmitter and the receiver . Measured power efficiency of the receiver at 25 Gb/s is 4.4 pJ/bit. The core of the 32 nm SOI CMOS circuit occupies 200 µm × 300 µm.