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JSSC 2019第1期Memory28nmEmerging Memory

A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-Termination

28纳米1T1MTJ STT-MRAM存储器,采用单电容失调消除感测放大器和原位写入自终止技术
1-Mb容量, 2.8ns/3.6ns读取时间(25°C/120°C), 47%/60%写入功耗降低(25°C/120°C)
STT-MRAM1T1MTJ感测放大器写入自终止非易失性存储器
创新点1:单电容失调消除感测放大器(电路创新) - 该设计采用仅需单个电容的失调消除技术,显著提升了感测裕度并加速了读取速度,实现了2.8 ns(25°C)和3.6 ns(120°C)的读取延迟,同时简化了传统多电容结构的复杂度。
创新点2:原位写入自终止技术(系统创新) - 通过动态重构感测放大器实时监测写入操作,在磁性翻转完成后立即关闭写入驱动器,减少无效写入时间,使写入功耗降低47%(25°C)和60%(120°C),且无需额外面积开销。
创新点3:无面积开销的感测放大器重构(方法创新) - 利用现有感测放大器电路的可重构性,在写入阶段切换为状态监测模式,实现功能复用,避免了传统方案中额外控制电路的面积代价。
创新点4:28nm 1T1MTJ单元高密度集成(工艺创新) - 在28nm工艺节点实现1Mb存储阵列,验证了1T1MTJ结构在先进制程下作为嵌入式非易失存储器的可行性,兼具面积效率与可靠性。
Abstract
1T1MTJ spin-transfer-torque (STT)-MRAM is a promising candidate for next-generation high-density embedded non-volatile memory. This paper presents a 1-Mb 28-nm 1T1MTJ STT-MRAM with improved sensing margin and reduced power consumption. An offset-cancelled sense amplifier is proposed, using only a single capacitor, to improve sensing margin and accelerate read speed. To save write power, an in situ write- self-termination method is proposed where the sense amplifier is reconfigured without area overhead to continuously monitor the write operation and shutoff the write drivers as soon as the magnetic transition occurs in the bitcell. A prototype chip achieves 2.8- and 3.6-ns read access time at 25 °C and 120 °C, respectively. The in situ write-self-termination scheme reduces write power by 47% and 60% with 20-ns write access time at 25 °C and 120 °C, respectively.