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IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems Christopher Berry , David Wolpert, Christos Vezrytzis, Richard Rizzolo, Sean Carey, Yaniv Maroz, Hunter Shi, Dureseti Chidambarrao, Christian Jacobi, Anthony Saporito, Thomas Strach
IBM z14处理器的高可靠性设计与先进电源管理技术
5.2-GHz高功率设计
IBM z14高可靠性电源管理关键路径监测处理器表征
▸先进的片上电源管理能力以适应高功耗指令流
▸关键路径监测设计的改进以减少响应时间和对系统性能的影响
▸通过仿真和硬件结果验证电源波动模型
Abstract
The IBM z14 is the latest update in the storied history of IBM mainframes. Reliability, availability, security, and scalability are the foundation of the IBM mainframe line. System reliability and availability targets are in excess of 10 years, requiring rigorous chip characterization processes. In this paper, we discuss some of the many processes used to ensure that lifetime. An additional part of this reliability is power man- agement (PM). The 5.2-GHz high-power design of the central processor chip requires advanced on-die PM capabilities to adapt to power intensive instruction streams. We also discuss a number of improvements to the critical path monitoring design used to manage power supply voltage droops, reducing response time and the impact on system performance. Finally, we compare a set of simulations and hardware results to validate our power fluctuation models.