JSSC 2019第4期Data Converters40nmSAR ADCVCO

A 0511-V Adaptive Bypassing SAR ADCUtilizing the Oscillation-Cycle Informationof

提出一种利用VCO比较器振荡周期信息实现自适应旁路的SAR ADC，提高能效。

40nm CMOS, 0.511V, 10MS/s, 9.71b ENOB, 2.4–6.85 fJ/conv.-step FoM

SAR ADCVCO比较器振荡周期数自适应旁路PVT鲁棒性

▸利用VCO比较器的振荡周期数（NOC）实现并行粗量化

▸引入自适应旁路技术以应对PVT变化

▸背景跟踪与校正窗口大小，无需外部校准

Abstract

A successive approximation register (SAR) analog- to-digital converter (ADC) with a voltage-controlled oscillator (VCO)-based comparator is presented in this paper. The rela- tionship between the input voltage and the number of oscil- lation cycles (NOC) to reach a VCO-comparator decision is explored, implying an inherent coarse quantization in parallel with the normal comparison. The NOC as a design parameter is introduced and analyzed with noise, metastability, and tradeoff considerations. The