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A 08-V 829-μW In-Ear BCI Controller IC With88 PEF EEG Instrumentation Amplifiera
一款用于耳内脑机接口的低功耗控制器芯片，具有高能效EEG放大器。
65nm CMOS, 8.8 PEF, 829μW
脑机接口低功耗EEG放大器体信道通信SoC
▸电流复用低噪声放大器(CRLNA)降低功耗
▸自举直流伺服环路(BDSL)支持高电极直流偏移下的低噪声测量
▸双模式可编程增益放大器(DMPGA)减少收发器功耗
Abstract
In-ear brain–computer interface (BCI) controller
system is implemented with a dedicated system-on-chip (SoC)
including electroencephalography (EEG) readout and body chan-
nel communication (BCC) transceiver (TRX). The 8-mm
2 chip
is fabricated using 65-nm CMOS and contains three key fea-
tures: 1) current reusing low-noise amplifier (CRLNA) for low
power; 2) bootstrapping dc servo loop (BDSL) enabling low-noise
measurement even on 350-mV electrode dc offset (EDO); and
3) dual-mode programmable ga