Inverter-Based Subthreshold Amplifier Techniques and Their Application in 0.3-V -Modulators

Abstract

Subthreshold amplifiers suffer from the limited volt- age headroom which leaves little space for conventional analog techniques to enhance performance and efficiency. This paper presents an evolution process of implementing conventional struc- tures with inverters, allowing ultralow-voltage operation with increased flexibility in adopting traditional circuit techniques. Based on the proposed inverter-based elementary structure and CMFB, both the Miller-compensated (MC) operational transcon- ductance amplifier (OTA) and the feedforward-compensated (FFC) OTA achieve significantly improved performance as com- pared to previous works. The proposed amplifier techniques are verified in  modulator (DSM) design, with MC-OTA for a DT-DSM and FFC-OTA for a CT-DSM, both fabricated in a 0.13-μm CMOS. The 0.3-V DT-DSM achieves 74.1-dB SNDR, 83.4-dB SFDR and 20-kHz bandwidth with 79.3- μWp o w e r , resulting in a Schreier figure of merit (FoM) of 158 dB. The 0.3-V CT-DSM achieves 68.5-dB SNDR, 82.6-dB SFDR, and 50-kHz bandwidth with 26.3- μW power, leading to a Schreier FoM of 161 dB. Both DSMs exhibit highly competitive per- formance among sub-0.5-V designs, validating the proposed subthreshold amplifier techniques.