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A Calibration-Free 12-bit 50-MSs Full-Analog SAR ADC With Feedback Zero-Crossing
提出一种无需校准的12位50MS/s全模拟SAR ADC，采用反馈过零检测技术。
12-bit, 50-MS/s, 0.01 mm²
SAR ADC反馈过零检测全模拟无需校准40nm CMOS
▸反馈过零检测器集成比较器、SAR逻辑和DAC开关
▸子基数DAC冗余消除偏移失配
▸共享FB-ZCD与电容耦合决策网络
Abstract
This paper presents a calibration-free 12-bit
50-MS/s full-analog SAR analog-to-digital (A-to-D) converter
(ADC) in 40-nm CMOS, which integrates the functions of
comparator, SAR logic, and digital-to-analog converter (DAC)
switches into multiple feedback zero-crossing detectors (FB-
ZCDs). By eliminating all the digital circuits, the full-analog
bit conversions operate with the asynchronous amplification-to-
regeneration (A-to-R) operation that highly relaxes the require-
ments of the analog circ