← 返回 JSSC 论文列表JSSC 2019第7期Data Converters65nmSAR ADC
A 01-nW-1-uW Energy-Efficient All-Dynamic Versatile Capacitance-to-Digital Conve
一种基于全动态架构的低功耗、高能效电容数字转换器,适用于物联网应用。
65nm CMOS, 1 S/s至100 kS/s采样率, 1.23至24.59 pF电容范围, 0.1nW至1µW功耗, 18-59 fJ/conv-step FoM
电容数字转换器物联网低功耗动态架构相关双采样
▸全动态架构支持自适应速度、分辨率和范围
▸采用无源相关双采样技术实现全动态操作
▸支持超低功耗范围(0.1nW至1µW)
Abstract
A versatile, low-power, and energy-efficient
capacitance-to-digital converter (CDC) for Internet-of-Things
(IoT) is presented, based on an all-dynamic architecture with
adaptable speed, resolution, and range. The proposed CDC
includes a single-armed capacitive bridge and a differential
switched-capacitor 10-b asynchronous successive approximation
register (SAR) analog-to-digital-converter (ADC). The bridge
output is directly sampled by the ADC through fully passive
correlated-double-sampling (CDS