← 返回 JSSC 论文列表JSSC 2019第7期Data Converters0.18µmDAC
A Robust BBPLL-Based 018-um CMOS Resistive Sensor Interface With High Drift
一种基于BBPLL的0.18微米CMOS抗漂移电阻传感器接口，具有高精度和低漂移特性。
0.18-µm CMOS, 15-bit ENOB, 100-ms转换时间, 3.41 mW功耗, 0.23 mm²面积
电阻传感器接口时间域斩波VCO调谐漂移抑制BBPLL
▸采用时间域斩波和VCO调谐技术实现漂移抑制
▸高度数字化的设计减少模拟电路对漂移的敏感度
▸单温度校准方案无需外部精密参考元件
Abstract
This paper presents a drift-resilient time-based
resistive sensor interface in a 0.18- µm CMOS technology. The
interface is built around only two oscillators, a phase detector,
a digital filter, and a digital-to-analog converter (DAC), resulting
in a simple first-order Delta–Sigma design with a predictable
transfer function. The highly digital approach not only results
in a small area but also implies that only a few analog circuits
are sensitive to drift. The holisti c drift-resilience strategy i