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JSSC 2019第7期Clocking & PLLs28nm

Analysis and Design of a Foam-Cladded PMF Link With Phase Tuning in 28-nm CMOS

本文设计了一种140GHz泡沫包覆介质波导通信链路,采用新型FSK解调器拓扑,实现了12Gb/s的数据传输。
28nm CMOS, 0.9V, 230mW, 12Gb/s/10Gb/s/7Gb/s
140GHz介质波导FSK解调器CMOS数据传输
创新点1:泡沫包覆介质波导通信链路(系统创新)。该论文提出了一种采用泡沫包覆纤维的140 GHz介质波导通信链路,通过优化波导结构降低了信号衰减,实现了12 Gb/s/10 Gb/s/7 Gb/s的数据传输速率,分别在1 m/2 m/4 m的PTFE纤维上验证了其高性能。
创新点2:新型FSK解调器拓扑(电路创新)。设计了一种带有低频反馈环路的FSK解调器,能够在工艺、电压和温度变化下实现最优解调,显著提高了系统的稳定性和可靠性。
创新点3:片上本地振荡器与移相器(方法创新)。通过引入移相器和片上本地振荡器,放松了设计需求,同时中频级获得了更大的增益,提升了整体系统的灵活性和性能。
创新点4:基于变压器的耦合缓冲器设计(电路创新)。发射机采用基于140 GHz基频振荡器的变压器耦合缓冲器,有效减少了电容负载,提高了信号传输效率,同时降低了功耗。
Abstract
This paper presents a fully packaged 140-GHz dielectric waveguide (DWG) communication link using a foam- cladded fiber. A novel frequency shift keying (FSK) demodulator topology is proposed with a low-frequency feedback loop for optimal FSK demodulation under process, voltage, and tem- perature variation. The introduction of phase shifters and an on-chip local oscillator relaxes the design requirements and the IF-stage benefits from larger gain. The transmitter is based on a fundamental oscillator at 140 GHz with a transformer-coupled buffer to decrease capacitive loading. Both chips are implemented in a 28-nm bulk CMOS design with a nominal supply of 0.9 V and a combined power consumption of 230 mW. An analysis of the DWG data capacity limitations is presented and compared with measurement results. Data rates of 12 Gb/s/10 Gb/s/7 Gb/s over 1 m/2 m/4 m of touchable polytetrafluoroethylene (PTFE) fiber are achieved.