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JSSC 2019第8期Power Management65nm

A 763 pW 230 pJ/Conversion Fully Integrated CMOS Temperature-to-Digital Converter With +0.81 ◦C/−0.75 ◦C Inaccuracy

提出一种亚纳瓦级全集成CMOS温度传感器,采用电容充电时间反馈环路实现温度数字化。
65nm CMOS, 0.5V, 763pW, 230pJ/conversion
温度传感器CMOS超低功耗数字化反馈环路
创新点1:LSB-first算法控制反馈环路(方法创新)。该论文采用LSB-first算法精确控制电容充电时间反馈环路,显著提高了温度数字转换的精度和效率,最大温度误差仅为+1.61°C/−1.53°C,并通过校准进一步优化至+0.81°C/−0.75°C。
创新点2:超低功耗电流参考发生器(电路创新)。设计了一种新型电流参考发生器,仅消耗763 pW的极低功耗,支持0.5 V超低电压供电,为整个温度传感器提供了稳定的基准电流。
创新点3:能量高效数字处理单元(系统创新)。通过优化的数字处理单元(DPU)实现电容充电时间的动态调整,每转换仅消耗230 pJ能量,显著降低了系统整体功耗。
创新点4:双电容充电结构(电路创新)。采用MIM电容Ctop和Cbot分别生成Vramp,top和Vramp,bot,并与CWT和PTAT电压比较,实现了高精度的温度数字化转换。
Abstract
A sub-nW fully integrated temperature sensor is presented that digitizes temperature via a capacitive charging time feedback loop controlled by a least significant bit (LSB)-first algorithm. Specifically, an ultra-low-power current reference gen- erator charges two metal–insulator–metal (MIM) capacitors C top and Cbot, generating Vramp,top and Vramp,bot which are then compared to a constant with temperature (CWT) voltage and a proportional to absolute temperature (PTAT) voltage, respec- tively. Temperature is then digi tized by matching the charging time between the V ramp,top and Vramp,bot via feedback tuning of Ctop driven by an energy-efficient digital processing unit (DPU) for direct ultra-low-power digital readout. The design is fabri- cated in 65 nm complementary metal–oxide–semico nductor, and measurement from 12 samples reveals a maximum tempera- ture error of +1.61 ◦C/−1.53 ◦C( +0.86 ◦C/−0.83 ◦C) and +0.81 ◦C/−0.75 ◦C when operating from 0 ◦C to 100 ◦C after two-point (three-point) calibra tion without and with trimming, respectively. Operating from a 0.5 V supply, the 12 samples consumed an average power of 763 pW at 20 ◦C, which after a 0.3 s conversion time results in 230 pJ/conversion.