← 返回 JSSC 论文列表JSSC 2019第8期Digital Circuits0.18µmNeural Network Accelerator
A Low-Noise Chopper Amplifier Designed for Multi-Channel Neural Signal Acquisitio
设计了一种用于多通道神经信号采集的低噪声、低谐波失真斩波放大器。
TSMC 0.18µm CMOS, 1.8V, 3.24µW/通道, THD < -61dB, 输入参考噪声0.65µVrms (0.3–200Hz)
低噪声斩波放大器神经信号采集直流伺服环路运算跨导放大器
▸基于主动Gm-C积分器的直流伺服环路（DSL）用于抑制电极直流偏移（EDO）
▸互补输入极低跨导（VLT）运算跨导放大器（OTA）提高线性度和降低噪声
▸高通过滤角频率可精确配置和线性调整
Abstract
This paper proposed the design of a low-noise,
low total harmonic distortion (THD) chopper amplifier for
neural signal acquisition. A dc servo loop (DSL) based on
active Gm-C integrator is proposed to reject the electrode-dc-
offset (EDO). Architecture of a complementary input very low-
transconductance (VLT) operational transconductance amplifier
(OTA) was proposed and integrated in the active Gm-C integrator
to improve the linearity as well as to reduce the noise, featuring a
transconductance ra