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A Calibration-Free 13-Bit 10-MSs Full-Analog SAR ADC With Continuous-Time Feedfo
一种无需校准的13位10MS/s全模拟SAR ADC,采用连续时间前馈级联运放和自触发放大再生操作。
40nm CMOS, 13-bit, 10-MS/s
SAR ADC全模拟连续时间前馈再生放大器无需校准
▸连续时间前馈级联(CTFC)运放增强残余功率
▸基于逆变器的再生放大器(IRA)零交叉检测器(ZCD)
▸LSB重复技术消除偏移不匹配
Abstract
This paper presents a calibration-free 13-bit
10-MS/s full-analog successive-approximation-register analog-to-
digital converter (SAR ADC) in 40-nm CMOS, which fully
utilizes the timing and power budgets in a bit-conversion
cycle by eliminating the digital circuits entirely. Continuous-
time feedforward cascaded (CTFC) op-amps are proposed to
enhance the residue power without the necessity of high-precision
quantizers. As opposed to the residue amplifiers (RAs) in multi-
step/pipelined ADCs, the