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JSSC 2019第11期Data Converters0.13μm CMOSDelta-Sigma ADC

A 22-bit Read-Out IC With 7-ppm INL and Sub-100-μHz 1 f Corner for DC Measuremen

一款22位读出IC，采用电容耦合仪表放大器和增量Δ-Σ ADC，实现7ppm INL和40μHz 1/f噪声拐角。
21.9位有效分辨率，7ppm INL，40μHz 1/f拐角，142μA@3V，18μA@1.5V
22位读出IC电容耦合仪表放大器增量Δ-Σ ADC斩波技术低频噪声抑制
▸采用级联米勒补偿差分差分放大器(DDA)和钳位晶体管提高能效
▸通过斩波和相关双采样(CDS)技术抑制偏移和1/f噪声
▸系统级二阶斩波技术和移动平均FIR滤波器进一步降低低频噪声
Abstract
A 22-bit read-out integrated circuit (IC) is constructed from a capacitively coupled instrumentation ampli- fier (CCIA) followed by an incremental delta-sigma () analog- to-digital converter (ADC), both of which have programmable gain. The CCIA has a cascode Miller-compensated differential difference amplifier (DDA) with clamp transistors for energy efficiency. The offset and 1/ f noise of the fully differential read-out IC are suppressed by chopping and correlated dou- ble sampling (CDS) techniq