← 返回 JSSC 论文列表JSSC 2019第12期Digital Circuits45nmNeural Network Accelerator
A DC-to-108-GHz CMOS SOI Distributed Power Amplifier and Modulator Driver Leverag
提出一种采用堆叠增益单元和多输入驱动信号的互补分布式功率放大器，实现从直流到108 GHz的宽带平坦增益。
45nm RFSOI, 23dB增益, 108GHz带宽, 16.9dBm P1dB, 100Gb/s 64-QAM/PAM-4
分布式功率放大器CMOS SOI宽带放大器调制驱动器堆叠增益单元
▸堆叠多驱动补偿高频输入传输线损耗
▸宽带有源分路器实现非线性补偿
▸互补分布式路径设计提升增益带宽积
Abstract
This article proposes a complementary distributed
power amplifier (DPA) using stacked gain cells with multiple
input driving signals. The stack multi-drive compensates for
the increasing input transmission line (TL) and stack losses as
frequency increases and results in bandwidth (BW) extension
with a flat gain response. The technique simultaneously increases
the gain-BW (GBW) product and the output power at high
frequencies while maintaining a smaller chip area compared
with the conventional DPA