← 返回 JSSC 论文列表JSSC 2019第12期Power Management14nm
A Light-Load Efficient Fully Integrated V oltage Regulator in 14-nm CMOS With 25-
14nm CMOS工艺下实现轻载高效全集成电压调节器,峰值效率达88%。
14nm CMOS, 1.6–1.2V, 70MHz
全集成电压调节器轻载效率不连续导通模式空气芯电感高开关频率
▸创新点1:高效不连续导通模式(DCM)操作 - 该方法创新通过优化DCM操作,显著提升了轻载效率,峰值效率达到88%,解决了高开关频率下的效率瓶颈问题。
▸创新点2:nH级空气芯电感 - 该电路创新采用nH级空气芯电感,减小了电感体积和损耗,同时提升了高频下的性能,适用于高集成度应用。
▸创新点3:高开关频率下的零电流检测 - 该系统创新通过精确的零电流检测技术,确保了DCM在高开关频率(70 MHz)下的稳定运行,避免了电流过零误差带来的效率损失。
▸创新点4:电源分配网络(PDN)共振抑制 - 该系统创新通过优化PDN设计,有效抑制了高频操作下的共振现象,提升了系统的稳定性和可靠性。
Abstract
Fully integrated voltage regulators (FIVRs) offer
many advantages, such as fine-grained power management,
fast transient response, and reduced form factor. This article
addresses light-load efficiency in FIVRs with nH-scale air-core
inductors. The challenges of implementing efficient discontinuous
conduction mode (DCM) operation at high switching frequencies
are discussed, which include zero current detection, inductor
ac-loss effects, and power delivery network (PDN) resonances.
A prototype in 14-