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A Watt-Level Phase-Interleaved Multi-Subharmonic Switching Digital Power Amplifie
提出一种相位交错多子谐波开关数字功率放大器架构，提升功率回退效率并实现瓦级输出功率。
1.9GHz 30dBm峰值功率，45.9%/41.3%/35.3%/32.2%/24.2%效率（0/-3.5/-7.0/-9.5/-12dB PBO）
数字功率放大器相位交错子谐波开关功率回退效率CMOS
▸相位交错架构实现子谐波分量固有抵消
▸多子谐波开关方案与class-G操作结合
▸变压器三路功率合成器与三重堆叠class-D驱动器
Abstract
This article presents a multi-subharmonic switching
(SHS) digital power amplifier (PA) architecture for enhancing
power back-off (PBO) efficiency while achieving watt-level output
power. The proposed phase-interleaved architecture provides the
inherent cancellation of the subharmonic components in the PBO
region, alleviating the burden of the matching network. The
proposed multi-SHS scheme can be further combined with a
class-G operation to create a greater number of efficiency peaks
in the PBO reg