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A 205 TOPS Multicore SoC With DNN Accelerator and Image Signal Processor for Aut
一款面向ADAS应用的高性能低功耗异构SoC,集成DNN加速器和ISP,具备高可靠性设计。
16nm工艺, 94.52mm²面积, 20.5TOPS算力, 9.78W功耗
ADAS异构SoCDNN加速器图像信号处理器可靠性设计
▸异构架构集成10核处理器+4DSP+8种加速器
▸采用系统分区和诊断功能提升可靠性
▸垂直消隐期自测试控制器设计
Abstract
Advanced driver-assistance systems (ADASs) that
provide machine support to avoid critical accidents are already
in wide use in vehicles in today’s market. SoCs for such systems
have several requirements: 1) high computational performance
to run several advanced algorithms at low latency; 2) low power
consumption to permit running under the extreme heat and
power conditions of real-world vehicles; and 3) high reliability to
reduce the risk of serious accidents caused by faults. This article
prese