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JSSC 2020第1期Memory55nmSRAM

A Twin-8T SRAM Computation-in-Memory Unit-Macro for Multibit CNN-Based AI Edge P

提出一种基于双8T SRAM的存内计算单元宏，用于多比特CNN边缘AI处理，提升能效和带宽。
55nm工艺, 5ns访问时间, 37.5-45.36 TOPS/W能效
存内计算SRAM人工智能边缘计算能效优化
▸紧凑型双8T（T8T）单元减少面积和工艺变化影响
▸奇偶双通道输入映射扩展输入带宽
▸可配置全局-局部参考电压生成支持不同核尺寸和比特精度
Abstract
Computation-in-memory (CIM) is a promising candidate to improve the energy efficiency of multiply-and- accumulate (MAC) operations of artificial intelligence (AI) chips. This work presents an static random access memory (SRAM) CIM unit-macro using: 1) compact-rule compatible twin-8T (T8T) cells for weighted CIM MAC operations to reduce area overhead and vulnerability to process variation; 2) an even–odd dual-channel (EODC) input mapping scheme to extend input bandwidth; 3) a two’s complement weigh