A 0.3 lx–1.4 Mlx Monolithic Silicon Nanowire Light-to-Digital Converter With Temperature-Independent Offset Cancellation Cyuyeol Rhee , Junyoung Park, Student Member , IEEE

Abstract

This article presents a monolithic light-to-digital converter (LDC) based on silicon nanowires. The silicon nanowires are arranged in a configuration, which allows can- cellation for the offset due to dark leakage current and facil- itates system-level chopping of the signal chain, including the nanowires. The readout integrated circuit (ROIC) has an ana- log front end (AFE) with a resistive-feedback transimpedance amplifier (TIA) to provide a constant voltage that strongly biases the nanowires. A programmable-gain switched-capacitor incremental delta–sigma analog-to-digital converter doubles the output of the TIA and feeds a digital back end that provides a decimated output. Finally, system-level chopping reduces the residual offset and 1/ f noise, and 50-/60-Hz rejection suppresses interference from mains lighting. Fabricated in a 0.18-µmC M O S process, the LDC has an input-referred current noise density of 235 fA/ √ Hz, and a dynamic range of 106.7, from 0.3 lx to 1.4 Mlx. The offset from the nanowires and the AFE is reduced to less than 30 µV and offset drift of 193 nV/°C in a temperature range of −40 °C–85 °C. The AFE of the LDC draws 59.5 µAa t 3.3 V , and the digital back end draws 8 µAa t1 . 8V .