← 返回 JSSC 论文列表JSSC 2020第2期RF & Wireless28nmNeural Network Accelerator
A 292-Gbps per W and 043-Gbps per MG Flexible and Scalable CGRA-Based Baseband P
提出基于动态粗粒度可重构阵列的基带处理器，支持大规模MIMO检测的高灵活性和可扩展性。
28nm CMOS, 292Gbps/W, 043Gbps/MG
大规模MIMO基带处理器可重构阵列矩阵运算能效优化
▸按需矩阵-向量脉动阵列设计，减少82%内存访问
▸分布式多交互数据存储，提升数据访问灵活性和可重用性
▸可延续自适应上下文信息格式，减少67%上下文信息
Abstract
Communication systems’ development requires ser-
vice customization in aspects, such as standards, multiple-input
multiple-output (MIMO) scales, and algorithms. The existing
hardware designs for massive MIMO detection have difficulty
in achieving both high flexibility and scalability with high
hardware efficiency. This article proposes a baseband processor
based on a dynamic coarse-grained reconfigurable array (CGRA)
for massive MIMO detection. To efficiently support various
algorithm features and re