A 32-Gb/s Simultaneous Bidirectional Source-Synchronous Transceiver With Adaptive Echo Cancellation Techniques Yang-Hang Fan , Student Member , IEEE, Ankur Kumar , Student Member , IEEE, Takayuki Iwai

Abstract

Increased bandwidth per pin is necessary to support the growing data throughput in mobile systems. This article presents a low-power simultaneous bidirectional (SBD) trans- ceiver employing a novel voltage-mode driver with a resistor- transconductance (R-gm) hybrid subtractor to enable concurrent transmission and reception of data on a single differential channel. A finite impulse response (FIR) filter-based adaptive echo cancellation system that cancels both near- and far-end echoes allows for the support of a wide range of channels, while a continuous-time linear equalizer (CTLE) efficiently compensates for channel loss. The quarter-rate source-synchronous transceiver utilizes a low-complexity phase interpolator-based clock and data alignment system to set the optimum data sampling point. Fab- ricated in 28-nm CMOS, the 32-Gb/s SBD transceiver achieves 1.83 mW/Gb/s and compensates 10.2-dB loss at a bit error rate (BER) <10 −12.