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JSSC 2020第3期RF & Wireless45nm CMOS SOIPower Amplifier

A CMOS 1.2-V Hybrid Current- and V oltage-Mode Three-Way Digital Doherty PA With Built-In Phase

本文提出了一种采用CMOS工艺的12V混合电流和电压模式三路数字Doherty功率放大器,具有内置大信号相位非线性补偿功能。
38.5%峰值漏极效率,22.4dBm饱和输出功率,3.4-/9.3-dB PBO下32.1%/18.7%效率
数字Doherty PACMOS相位非线性补偿变压器网络效率增强
混合电流和电压模式数字PA的非线性相位响应分析及补偿
基于变压器的Doherty输出网络实现三路Doherty PA
1.2V单电源供电降低电源复杂性
Abstract
This article presents a fully integrated hybrid current- and voltage-mode three-way digital Doherty power amplifier (PA) in CMOS using a single supply with built- in large-signal phase nonlinearity compensation. The nonlinear phase responses in both current-mode digital PA (C-DPA) and voltage-mode digital PA (V-DPA) are theoretically analyzed, which are further leveraged to achieve the PA nonlinear phase compensation. To the best of our knowledge, it is the first time the amplitude modulation (AM)–phase modulation (PM) response in V-DPA is explained in detail. The PA exploits the lagging AM–PM distortion of C-DPA and leading AM–PM distortion of V-DPAs, resulting in built-in large-signal phase nonlinearity cancellation without phase pre-distortion. Moreover, the transformer-based Doherty output network provides active load modulation to both C-DPA and V-DPA, achieving a three-way Doherty PA for deep power back-off (PBO) efficiency enhancement without supply modulation. Finally, the 1.2-V single power supply for PA power cells and input drivers reduces supply complexity. As a proof-of- concept, the hybrid three-way digital Doherty PA is implemented in a 45-nm CMOS SOI process. The measurements show a 38.5% peak drain efficiency (DE), 22.4-dBm saturated output power (Psat), and 32.1%/18.7% DE at 3.4-/9.3-dB PBO, achieving ×1.25/×1.46 PBO efficiency enhancement over idealistic class-B PA PBO efficiency at 2.3 GHz. The measured AM–PM distortion is 4.7 ◦ which is state-of-the-art amo ng