← 返回 JSSC 论文列表JSSC 2020第3期Clocking & PLLs65nmVCOCrystal Oscillator
A Low-Noise Frequency Synthesizer Using Multiphase Generation and Combining Tech
提出一种基于环形振荡器的低噪声频率合成器,通过多相生成和组合技术降低抖动积累引起的相位噪声。
65nm CMOS, 54MHz输入, 5GHz输出, 245fs rms抖动, 8.2mW总功耗
频率合成器多相生成低噪声环形振荡器注入锁定
▸使用RC网络实现多相生成器(MPG),降低功耗并避免抖动积累
▸采用数字背景校准技术缓解相位间距误差
▸结合注入锁定时钟倍频器生成高频低噪声输出时钟
Abstract
A ring oscillator (RO)-based low-noise frequency
synthesizer is presented. Phase noise degradation caused by jitter
accumulation in conventional RO-based synthesizers is alleviated
by increasing the update rate. T o this end, multiple phases of the
crystal oscillator (XO) output are generated and edge combined
to produce a clock at an integer multiple of the XO frequency,
which is then used as a reference clock to a conventional
injection-locked clock multiplier that generates a low-noise high-