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An mm-Wave Synthesizer With Robust Locking Reference-Sampling PLL and Wide-Range
一种采用两级架构的低噪声毫米波频率合成器，具有鲁棒锁定参考采样技术。
45nm PDSOI CMOS, 35.84GHz, 251-fs抖动, 20.6mW
毫米波频率合成器参考采样注入锁定低相位噪声
▸采用两级架构分别优化低频噪声合成和毫米波频率倍增
▸电压域参考采样相位检测器锁定环实现低相位噪声和鲁棒锁定
▸数字频率跟踪环路扩展注入锁定压控振荡器工作范围
Abstract
In this article, a two-stage millimeter (mm)-wave
frequency synthesizer with low in-band noise and robust locking
reference-sampling techniques is presented. Using a two-stage
scheme allows separately dealing with the low phase noise
(PN) frequency synthesis in the first stage and the mm-wave
frequency multiplication in the second stage, achieving the best
overall power efficiency. In the first stage, a voltage domain
reference-sampling phase detector (RSPD)-locked loop (RSPLL)
is adopted to achiev