← 返回 JSSC 论文列表JSSC 2020第4期Digital Circuits7nm
A 7-nm 4-GHz Arm--Core-Based CoWoS- Chiplet Design for High-Performance Computin
采用7nm工艺和CoWoS技术的双芯片组八核处理器，实现4GHz高频操作和高速数据传输。
7nm CMOS, 4GHz, 320GB/s, 0.56-pJ/bit, 1.6-Tb/s/mm2
7nm工艺CoWoS技术Arm Cortex-A72高频处理器芯片间通信
▸使用7nm CMOS工艺和15金属层实现高频操作
▸采用双向网状总线实现高速片上数据传输
▸通过LIPINCON接口实现芯片间高速通信
Abstract
We present a dual-chiplet interposer-based
system-in-package (SiP) octo-core processor using Chip-on-
Wafer-on-Substrate (CoWoS) technology. Each of the two
identical chiplets is implemented in 7-nm CMOS with 15
metal layers and has four Arm Cortex-A72 processor cores
operating at 4.0 GHz. A bidirectional mesh bus with 2-mm
flop-to-flop distance is distributed throughout the chiplet
for high-speed on-die data transport above 4.0 GHz. The
chiplets communicate with each other through ultrashort reac