▸创新点1：采用PAM-4调制技术实现128 Gb/s高速数据传输，显著提升带宽效率，相比传统NRZ调制方案带宽利用率提高一倍。
▸创新点2：设计可重构3抽头前馈均衡器（FFE），有效补偿信道损耗，降低码间干扰（ISI），在14nm CMOS工艺下实现1.3 pJ/b的超低功耗。
▸创新点3：系统级优化整合发射器架构，通过混合信号设计降低时钟分布网络功耗，同时支持多标准可配置性，适应不同应用场景需求。
▸创新点4：采用先进CMOS工艺节点（14nm）实现高性能模拟电路设计，在面积与功耗约束下达成高线性度与低抖动特性。
Abstract
, IEEE, Jonathan E. Proesel , Senior Member , IEEE,
John F. Bulzacchelli , Member , IEEE,H e r s c h e lA .A i n s p a n ,T i m o t h yO .D i c k s o n, Senior Member , IEEE,
Michael P. Beakes , Member , IEEE, and Mounir Meghelli, Member , IEEE
In [1], the photograph that appeared next to the author,
Herschel A. Ainspan, was not an image of this author and
was published in error. No photo should have accompanied
his name.
Manuscript received February 24, 2020; accepted February 24, 2020.
Date of