← 返回 JSSC 论文列表JSSC 2020第5期Data Converters0.18 µm CMOS
A 1022-dB- 1811-dB FoM Extended Counting Analog-to-Digital Converter With Capaci
本文介绍了一种高效能的增量型模数转换器（IADC），采用新颖的电容器缩放技术和扩展计数方案，实现了16位SNDR和17位动态范围。
102.2 dB动态范围，2.04 kHz带宽，25 µW功耗
增量型模数转换器电容器缩放扩展计数动态范围能效
▸电容器缩放技术降低功耗
▸扩展计数（EC）方案结合异步SAR ADC
▸三阶段操作降低功耗并提高带宽
Abstract
Sensor interfaces demand ever-increasing energy
efficiency from analog-to-digital converters (ADCs). For sensors
requiring a wide dynamic range (DR) (>12 bit), the incremental
ADC (IADC) is becoming a popular choice. In this article, the
design of an energy-efficient IADC with a 16-bit signal-to-noise
and distortion ratio (SNDR) and 17-bit DR is described. The
IADC implements a novel capacitor scaling technique, which
reduces power consumption in the critical first operational
transconductance ampl