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JSSC 2020第5期RF & Wireless65nm

A 39-GHz 64-Element Phased-Array Transceiver With Built-In Phase and Amplitude C

本文提出了一种39GHz 64单元相控阵收发芯片组,用于5G NR,具有内置相位和幅度校准功能。
65nm CMOS, 53 dBm EIRP, -30.0-dB EVM
39GHz相控阵收发器5G NR内置校准LO相位偏移
创新点1:本地振荡器相位偏移架构(LO phase-shifting architecture)采用分布式相位控制,实现0.04-dB最大增益波动和360°全调谐范围,显著提升大规模阵列系统的相位一致性(系统创新)。
创新点2:内置相位和幅度校准方案(built-in calibration)通过相位-数字转换器(PDC)和高分辨率相位检测机制,达到0.08° rms相位误差和0.01-dB rms幅度误差的校准精度(方法创新)。
创新点3:伪单平衡混频器(pseudo-single-balanced mixer)设计有效抑制LO馈通(LOFT)并增强子阵列TRX间的LO隔离度,支持5G NR 256-QAM调制下-30.0-dB EVM的高性能(电路创新)。
创新点4:64元素相控阵收发机集成8TX–8RX模块,实测EIRP MAX达53 dBm,功耗仅1.5W(TX模式)/0.5W(RX模式),在65-nm CMOS工艺中实现高能效毫米波通信(系统级能效创新)。
Abstract
This article presents the first 39-GHz phased-array transceiver (TRX) chipset for fifth-generation new radio (5G NR). The proposed transceiver chipset consists of 4 sub-array TRX elements with local-oscillator (LO) phase-shifting architecture and built-in calibration on phase and amplitude. The cali- bration scheme is proposed to alleviate phase and amplitude mismatch between each sub-array TRX element, especially for a large-array transceiver system in the base station (BS). Based on LO phase-shi