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JSSC 2020第5期RF & Wireless22nm FDSOI

A Fully Passive RF Front End With 13-dB Gain Exploiting Implicit Capacitive Stacking in a Bottom-Plate N-Path Filter/Mixer

提出一种利用新型电容堆叠技术的低功耗抗干扰混频器前端,实现13dB增益。
13dB电压增益,OOB IIP3/IIP2 +25/+66 dBm,5dB噪声系数,600µW功耗,LO=1GHz
电容堆叠混频器前端低功耗抗干扰变压器
创新点1:电容堆叠技术(方法创新) - 通过从N-path电容器的底部板而非顶部板读取电压,实现隐式电容堆叠,在降频转换后提供2倍电压增益,显著提升信号处理效率。
创新点2:底部板电压读出(电路创新) - 采用新颖的底部板电压读出机制,优化了传统N-path滤波器的信号路径,降低了噪声干扰,同时实现了13 dB的电压增益。
创新点3:变压器提升线性度(系统创新) - 利用步进变压器改善N-path混频器中开关的带外线性度性能,减少开关驱动器的功耗,使OOB IIP3/IIP2分别达到+25/+66 dBm。
创新点4:宽频带操作(系统创新) - 通过变压器设计,原型芯片在0.6–1.2 GHz的输入频率范围内实现超过10 dB的电压增益和5–9 dB的噪声系数,支持低功耗软件定义无线电应用。
Abstract
A low-power interferer-robust mixer-first receiver front end that uses a novel capacitive stacking technique in a bottom-plate N-path filter/mixer is proposed. Capacitive stacking is achieved by reading out the voltage from the bottom plate of N-path capacitors instead of their top plate, which provides a 2× voltage gain after downconversion. A step-up transformer is used to improve the out-of-band ( OOB) linearity performance of small switches in the N-path mixer, thereby reducing the power consumption of switch drivers. This article explains the concept of implicit capacitive stacking and analyzes its transfer charac- teristics. A prototype chip, fabricated in 22-nm fully depleted silicon on insulator (FDSOI) technology, achieves a voltage gain of 13 dB and OOB IIP3/IIP2 of +25/+ 66 dBm with 5-dB noise figure while consuming only 600 µWo fp o w e ra tf LO = 1 GHz. Thanks to the transformer, the prototype can operate in the input frequency range of 0.6–1.2 GHz with more than 10-dB voltage gain and 5–9-dB noise figure. Thus, it opens up the possibility of low-power software-defined radios.