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JSSC 2020第5期RF & Wireless28nm

Design and Analysis of Enhanced Mixer-First Receivers Achieving 40-dB/decade RF Selectivity

提出二阶无源混频优先接收器,提升信道选择性、线性度和噪声性能。
28nm CMOS, OOB IIP3 +33 dBm, 阻塞P1dB +12 dBm, NF 4.4 dB
混频优先接收器N路径滤波器线性度噪声系数CMOS
40 dB/decade阻抗滚降设计
宽带操作(0.2-2 GHz)
高线性度(OOB IIP3 +33 dBm)
Abstract
A “second-order” passive mixer-first receiver is proposed to improve channel selectivity, linearity, and noise figure (NF) in the presence of out-of-band blockers, by presenting an impedance that rolls off at 40 dB/decade as the load to an N-path filter. The synthesis of this impedance is described in a step-by-step manner starting from the required impedance transfer function to its actual circuit realization. Various tradeoffs and limitations of the architecture are described in detail, and layout-related techniques are also provided. Two integrated circuit prototypes were fabricated in 28-nm bulk CMOS as proof of concept for this circuit, including a low-power version. The receiver, capable of broadband operation from 0.2 to 2 GHz, achieves an out-of-band IIP3 of +33 dBm and a blocker P1dB of +12 dBm. Additionally, it achieves an NF of 4.4 dB with less than 2-dB degradation in NF for a 0-dBm blocker.