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JSSC 2020第6期Memory180nm

A 187-mm2 569-GOPS Accelerator for Solving Partial Differential Equations

提出一种基于SRAM的低精度并行计算加速器,用于高效求解偏微分方程。
1.87-mm² 180-nm, 200 MHz, 16.6 mW, 1.38-G entries/s
偏微分方程多网格法SRAM并行计算低精度
采用多网格法与混合层更新减少迭代次数
将精细和粗糙网格转换为残差形式以降低精度要求
使用延迟锁定环和双斜坡单斜率ADC提高控制精度
Abstract
Solving partial differential equations (PDEs) require high-precision numerical iterations that are demanding in both computation and memory. We apply the multigrid method with a hybrid layer update to reduce iterations and improve speed, and to transform both fine and coarse grids to a residual form to reduce the precision requirement. The reduced precision enables the mapping of a high-precision PDE solver on SRAMs that perform low-precision parallel multiply-accumulates (MACs) in memory, reduci